scientific article; zbMATH DE number 1798189
From MaRDI portal
Publication:4553262
zbMATH Open0996.68578MaRDI QIDQ4553262FDOQ4553262
Per Bjesse, Abdel Mokkedem, Tim Leonard
Publication date: 4 November 2002
Title of this publication is not available (Why is that?)
Recommendations
Computing methodologies and applications (68U99) Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical problems of computer architecture (68M07)
Cited In (18)
- Backdoors to q-Horn
- The state of SAT
- A taxonomy of exact methods for partial Max-SAT
- Quantifier reordering for QBF
- Design and results of the first satisfiability modulo theories competition (SMT-COMP 2005)
- Effective use of Boolean satisfiability procedures in the formal verification of superscalar and VLIW microprocessors.
- A formal methods approach to predicting new features of the eukaryotic vesicle traffic system
- Benchmarking a model checker for algorithmic improvements and tuning for performance
- Unrestricted vs restricted cut in a tableau method for Boolean circuits
- A semantic condition for data independence and applications in hardware verification
- Soundness of \(\mathcal{Q}\)-resolution with dependency schemes
- Backdoors to Satisfaction
- SCIP: solving constraint integer programs
- An Automata-Theoretic Approach to Infinite-State Systems
- A transformation-based approach to implication of GSTE assertion graphs
- 3-Valued Circuit SAT for STE with Automatic Refinement
- SAT-solving in practice, with a tutorial example from supervisory control
- Complete Boolean satisfiability solving algorithms based on local search
Uses Software
This page was built for publication:
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4553262)
