Explicit rateless codes for memoryless binary-input output-symmetric channels

DOI10.4086/TOC.2018.V014A004MaRDI QIDQ4568110zbMATH OpenOpenAlexFDO

Authors Benny Applebaum, Liron David, Guy Even

Publication date 15 June 2018

Published in Theory of Computing (Search for Journal in Brave)

Copyright license Creative Commons Attribution 4.0 International

Full work available at URL https://doi.org/10.4086/toc.2018.v014a004

zbMATH Keywords

error correcting codescoding theoryGaussian channelbinary symmetric channelrateless codesmemoryless binary-input output symmetric channel

Mathematics Subject Classification ID

Coding theorems (Shannon theory) (94A24) Linear codes (general theory) (94B05) Channel models (including quantum) in information and communication theory (94A40)

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Cites work

• An adaptive-feedback coding scheme using incremental redundancy (Corresp.)
• Bounds on the decoding error probability of binary linear codes via their spectra
• Deterministic rateless codes for BSC
• Error Exponents of Expander Codes under Linear-Complexity Decoding
• Error exponents of expander codes
• Linear-Time Encodable/Decodable Codes With Near-Optimal Rate
• Linear-time encodable and decodable error-correcting codes
• Random codes: minimum distances and error exponents
• Random coding techniques for nonrandom codes
• Raptor codes
• Rate-Compatible Puncturing of Low-Density Parity-Check Codes
• Rateless Coding for Gaussian Channels
• The throughput of hybrid-ARQ protocols for the Gaussian collision channel

Cited in

(3)

• scientific article; zbMATH DE number 3494264 (Why is no real title available?)
• Performance Bounds for Nonbinary Linear Block Codes Over Memoryless Symmetric Channels
• Deterministic rateless codes for BSC

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