An Information Theoretical Framework for Analysis and Design of Nanoscale Fault-Tolerant Memories Based on Low-Density Parity-Check Codes

DOI10.1109/TCSI.2007.902611MaRDI QIDQ4590264zbMATH OpenFDO

Authors Bane Vasić, Shashi Kiran Chilappagari

Publication date 20 November 2017

Published in IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TCSI.2007.902611

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07) Reliability, testing and fault tolerance of networks and computer systems (68M15) Linear codes (general theory) (94B05)

Cited in

(1)

• Nanowire addressing with randomized-contact decoders

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