Universal delay-insensitive systems with buffering lines

DOI10.1109/TCSI.2005.844229MaRDI QIDQ4590359zbMATH OpenFDO

Authors Jia Lee, Ferdinand Peper, Susumu Adachi, Shinro Mashiko

Publication date 20 November 2017

Published in IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TCSI.2005.844229

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

Cited in

(4)

• On non-polar token-pass Brownian circuits
• Universality frontier for asynchronous cellular automata
• Construction universality in purely asynchronous cellular automata
• Asynchronous self-reproducing loops with arbitration capability

This page was built for publication: Universal delay-insensitive systems with buffering lines

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4590359)