A continuous-time /spl Sigma//spl Delta/ Modulator with reduced sensitivity to clock jitter through SCR feedback

DOI10.1109/TCSI.2005.846227zbMATH Open1374.94702MaRDI QIDQ4590367FDOQ4590367

Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli

Publication date: 20 November 2017

Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Mathematics Subject Classification ID

Modulation and demodulation in information and communication theory (94A14)

Cited In (2)

• Low-sensitivityH_∞filter design for linear delta operator systems with sampling time jitter
• Constraints on constant-input oscillations of a bandpass sigma-delta modulator structure

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