A continuous-time /spl Sigma//spl Delta/ Modulator with reduced sensitivity to clock jitter through SCR feedback

DOI10.1109/TCSI.2005.846227MaRDI QIDQ4590367zbMATH OpenFDO

Authors Maurits Ortmanns, Friedel Gerfers, Yiannos Manoli

Publication date 20 November 2017

Published in IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TCSI.2005.846227

Mathematics Subject Classification ID

Modulation and demodulation in information and communication theory (94A14)

Cited in

(2)

• Low-sensitivity H_ filter design for linear delta operator systems with sampling time jitter
• Constraints on constant-input oscillations of a bandpass sigma-delta modulator structure

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