Detection of false paths in logical circuits by joint analysis of the AND/OR trees and SSBDD-graphs

DOI10.1134/S0005117913070084MaRDI QIDQ462034zbMATH OpenOpenAlexFDO

Authors A. Yu. Matrosova, S. A. Ostanin, V. Singh

Publication date 15 October 2014

Published in Automation and Remote Control (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1134/s0005117913070084

Mathematics Subject Classification ID

Applications of graph theory to circuits and networks (94C15)

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