Detection of false paths in logical circuits by joint analysis of the AND/OR trees and SSBDD-graphs
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Publication:462034
DOI10.1134/S0005117913070084zbMath1302.94075MaRDI QIDQ462034
J. Herrera, D. Rodríguez-Gómez
Publication date: 15 October 2014
Published in: Automation and Remote Control (Search for Journal in Brave)
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