Optimizing a fast stream cipher for VLIW, SIMD, and superscalar processors
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Publication:4639348
DOI10.1007/BFB0052353zbMATH Open1385.94021OpenAlexW1566297515MaRDI QIDQ4639348FDOQ4639348
Authors: Craig S. K. Clapp
Publication date: 9 May 2018
Published in: Fast Software Encryption (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/bfb0052353
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Cites Work
Cited In (9)
- Vector Instruction Set Extensions for Efficient Computation of <sc>Keccak</sc>
- A novel instruction stream buffer for VLIW architectures
- Optimal design of the feedback shift register based on the general-purpose reconfigurable processor
- Parallel stream cipher for secure high-speed communications
- Fast hashing and stream encryption with \textsc{Panama}
- Ensuring Fast Implementations of Symmetric Ciphers on the Intel Pentium 4 and Beyond
- On Software Parallel Implementation of Cryptographic Pairings
- Joint hardware/software design of a fast stream cipher
- Fast Software Encryption
Uses Software
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