Linear temporal logic symbolic model checking
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- A new heuristic for bad cycle detection using BDDs
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- Automatic verification of finite-state concurrent systems using temporal logic specifications
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- Büchi Complementation and Size-Change Termination
- Computer Aided Verification
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- Concepts of Automata Construction from LTL
- Correct Hardware Design and Verification Methods
- Correct Hardware Design and Verification Methods
- Decidability of model checking for infinite-state concurrent systems
- Deciding full branching time logic
- Decision procedures and expressiveness in the temporal logic of branching time
- Defining liveness
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- Proving the Correctness of Multiprocess Programs
- Reasoning about infinite computations
- Recognizing safety and liveness
- Reduction of OBDDs in linear time
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- Safety, liveness and fairness in temporal logic
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Cited in
(16)- Optimal control of multi-task Boolean control networks via temporal logic
- Abstraction-based synthesis for stochastic systems with omega-regular objectives
- A symbolic model for timed concurrent constraint programming
- Linear Temporal Logic of Constraint Automata
- Model checking of linear-time properties in multi-valued systems
- The Linear Temporal Logic of Rewriting Maude Model Checker
- BDD-based symbolic model checking
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- Model Checking Software
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- Towards better heuristics for solving bounded model checking problems
- Model checking properties on reduced trace systems
- SAT-based explicit \(\mathsf{LTL}_f\) satisfiability checking
- Applying formal verification to an open-source real-time operating system
- The Verus language: Representing time efficiently with BDDs
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