A pipelined multi-core MIPS machine. Hardware implementation and correctness proof

DOI10.1007/978-3-319-13906-7MaRDI QIDQ481104zbMATH OpenOpenAlexFDO

Authors Yong-Cai Geng, Sumit K. Garg

Publication date 12 December 2014

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-319-13906-7

zbMATH Keywords

multi-corehardware implementationcorrectness proofMIPS

Mathematics Subject Classification ID

Research exposition (monographs, survey articles) pertaining to computer science (68-02) Mathematical aspects of software engineering (specification, verification, metrics, requirements, etc.) (68N30) Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical problems of computer architecture (68M07)

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(4)

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