Novel designs of nanometric parity preserving reversible compressor
DOI10.1007/S11128-014-0762-6zbMATH Open1306.81021OpenAlexW1982172027MaRDI QIDQ488150FDOQ488150
Authors: Soghra Shoaei, Majid Haghparast
Publication date: 23 January 2015
Published in: Quantum Information Processing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s11128-014-0762-6
Recommendations
reversible logicquantum circuitstheoretical physicsnanometric circuitsparity preservationreversible compressor
Quantum computation (81P68) Coding and information theory (compaction, compression, models of communication, encoding schemes, etc.) (aspects in computer science) (68P30) Quantum information, communication, networks (quantum-theoretic aspects) (81P45) Finite-dimensional groups and algebras motivated by physics and their representations (81R05) Analytic circuit theory (94C05) Statistical mechanics of nanostructures and nanoparticles (82D80)
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- Design of a universal logic block for fault-tolerant realization of any logic operation in trapped-ion quantum circuits
- On figures of merit in reversible and quantum logic designs
- Designing parity preserving reversible circuits
- Novel parity-preserving designs of reversible 4-bit comparator
- Novel quantum compressor designs using new genetic algorithm-based simulator, analyzer and synthesizer software in nanotechnology
- A method for speed optimized partial product reduction and generation of fast parallel multipliers using an algorithmic approach
- Optimal circuits for parallel multipliers
Cited In (5)
- Optimized parity preserving quantum reversible full adder/subtractor
- Efficient designs of reversible BCD to EX-3 Converter with low quantum cost in nanoscale
- Novel reversible fault tolerant error coding and detection circuits
- On design of parity preserving reversible adder circuits
- Novel quantum compressor designs using new genetic algorithm-based simulator, analyzer and synthesizer software in nanotechnology
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