Efficient Vector Implementations of AES-Based Designs: A Case Study and New Implemenations for Grøstl

DOI10.1007/978-3-642-36095-4_10MaRDI QIDQ4910237zbMATH OpenOpenAlexFDO

Authors Severin Holzer-Graf, Thomas Krinninger, Martin Pernull, Martin Schläffer, Peter Schwabe, David Seywald, Wolfgang Wieser

Publication date 18 March 2013

Published in Topics in Cryptology – CT-RSA 2013 (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-642-36095-4_10

zbMATH Keywords

hash functionsSHA-3

Mathematics Subject Classification ID

Cryptography (94A60)

Recommendations

• Architectures and VLSI implementations of the AES-Proposal Rijndael
• Advanced Encryption Standard – AES
• Efficient design strategies based on the \textsf{AES} round function
• Pushing the limits: a very compact and a threshold implementation of AES
• Accelerating AES with Vector Permute Instructions
• A Fast and Cache-Timing Resistant Implementation of the AES
• Efficient and High-Performance Parallel Hardware Architectures for the AES-GCM

Cited in

(2)

• SHA-3 on ARM11 processors
• Parallel implementations of LEA

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