Approximation scheme for restricted discrete gate sizing targeting delay minimization
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Publication:491218
DOI10.1007/s10878-009-9267-0zbMath1319.94121OpenAlexW1980050726MaRDI QIDQ491218
Publication date: 24 August 2015
Published in: Journal of Combinatorial Optimization (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10878-009-9267-0
combinatorial optimizationVLSI designfully polynomial time approximation schemedelay optimizationdiscrete gate sizing
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