A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier With a Two-Phase PVT-Calibrator for <formula formulatype="inline"><tex Notation="TeX">\Delta\Sigma</tex></formula> PLLs

DOI10.1109/TCSI.2014.2370191MaRDI QIDQ5007654zbMATH OpenOpenAlexFDO

Authors Yongsun Lee, Mina Kim, Taeho Seong, Jaehyouk Choi

Publication date 26 August 2021

Published in IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tcsi.2014.2370191

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

Cited in

(1)

• A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator

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