Power-aware scheduling of data-flow hardware circuits with symbolic control

DOI10.24425/ACS.2021.137426OpenAlexW4384935242MaRDI QIDQ5010272FDOQ5010272

Authors: Nicolas Berthier 

Publication date: 25 August 2021

Published in: Archives of Control Sciences (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.24425/acs.2021.137426

zbMATH Keywords

power efficiencydigital synchronous circuitssymbolic discrete controller synthesis

Mathematics Subject Classification ID

Systems theory; control (93-XX) Computer science (68-XX)

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