In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults

DOI10.1109/TCSI.2010.2094370MaRDI QIDQ5010642zbMATH OpenFDO

Authors Wenyao Xu, Jia Wang, Yu Hu, Ju-Yueh Lee, Fang Gong, Lei He, Majid Sarrafzadeh

Publication date 26 August 2021

Published in IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TCSI.2010.2094370

Mathematics Subject Classification ID

Integer programming (90C10) Fault detection; testing in circuits and networks (94C12) Applications of graph theory to circuits and networks (94C15)

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