scientific article; zbMATH DE number 7559358

DOI10.4230/LIPICS.ECRTS.2019.24MaRDI QIDQ5089137FDOQ5089137

Authors: Marco Pagani, E. Rossi, Alessandro Biondi, Mauro Marinoni, Giuseppe Lipari, Giorgio C. Buttazzo 

Publication date: 18 July 2022

Title of this publication is not available (Why is that?)

zbMATH Keywords

FPGAhardware accelerationbandwidth reservationAXI bus

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Cites Work

• A survey of hard real-time scheduling for multiprocessor systems
• A calculus for network delay. I. Network elements in isolation
• Real-Time I/O Management System with COTS Peripherals
• A Globally Arbitrated Memory Tree for Mixed-Time-Criticality Systems
• A Comparison of FPGA and GPU for Real-Time Phase-Based Optical Flow, Stereo, and Local Image Features
• Performance Comparison of Graphics Processors to Reconfigurable Logic: A Case Study
• Impact of Peripheral-Processor Interference on WCET Analysis of Real-Time Embedded Systems

Cited In (1)

• Title not available (Why is that?)

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