SYSTOLIC ARRAY PROCESSING OF THE SEQUENTIAL DECODING ALGORITHM
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Publication:5202954
DOI10.1142/S0129053389000251zbMath0725.94005OpenAlexW2155252569MaRDI QIDQ5202954
Publication date: 1989
Published in: International Journal of High Speed Computing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1142/s0129053389000251
convolutional codeVLSI implementationstack algorithmsequential decoding algorithmsystolic array processingrandom access schemebasic sorting type problemsripple register schemeshift register schemesystolic priority queues
Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Decoding (94B35) Convolutional codes (94B10)
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