NNPIM: A Processing In-Memory Architecture for Neural Network Acceleration

DOI10.1109/TC.2019.2903055WikidataQ128280315 ScholiaQ128280315MaRDI QIDQ5229030FDOQ5229030

Authors: Saransh Gupta, Mohsen Imani, Harveen Kaur, Tajana Simunic Rosing 

Publication date: 13 August 2019

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Mathematics Subject Classification ID

Computer science (68-XX)

Cited In (1)

• Locally active memristor based oscillators: the dynamic route from period to chaos and hyperchaos

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