Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator

DOI10.1109/TC.2014.2315627MaRDI QIDQ5268089zbMATHzbMATHFDO

Authors Ardavan Pedram, A. Gerstlauer, Robert A. van de Geijn

Publication date 20 June 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Mathematics Subject Classification ID

Direct numerical methods for linear systems and matrix inversion (65F05) Numerical algorithms for computer arithmetic, etc. (65Y04) Numerical algorithms for specific classes of architectures (65Y10)

Cited in

(1)

• Accelerating BLAS and LAPACK via efficient floating point architecture design

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