Exact Response Time Analysis for Fixed Priority Memory-Processor Co-Scheduling

DOI10.1109/TC.2016.2614819zbMATH Open1368.68147MaRDI QIDQ5280460FDOQ5280460

Authors: Alessandra Melani, Marko Bertogna, Robert I. Davis, Vincenzo Bonifaci, Giorgio C. Buttazzo, Alberto Marchetti-Spaccamela 

Publication date: 27 July 2017

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Cited In (4)

• Title not available (Why is that?)
• Optimizing resource speed for two-stage real-time tasks
• Modeling of priorityless processing in an interleaved memory with a perfectly informed processor
• An extensible framework for multicore response time analysis

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