New Hardware Architectures for Montgomery Modular Multiplication Algorithm

DOI10.1109/TC.2010.247MaRDI QIDQ5280558zbMATH OpenFDO

Authors Miaoqing Huang, Kris Gaj, Tarek El-Ghazawi

Publication date 27 July 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Mathematics Subject Classification ID

Cryptography (94A60) Mathematical problems of computer architecture (68M07) Numerical algorithms for computer arithmetic, etc. (65Y04)

Cited in

(5)

• scientific article; zbMATH DE number 5017575 (Why is no real title available?)
• Scalable Montgomery Modular Multiplication Architecture with Low-Latency and Low-Memory Bandwidth Requirement
• A versatile Montgomery multiplier architecture with characteristic three support
• Hardware implementation of multiplication over quartic extension fields
• New frameworks for Montgomery’s modular multiplication method

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