A Combinatorial Approach to X-Tolerant Compaction Circuits

DOI10.1109/TIT.2010.2048468zbMATH Open1366.94666arXiv1508.00481MaRDI QIDQ5281389FDOQ5281389

Authors: Yuichiro Fujiwara, Charles J. Colbourn 

Publication date: 27 July 2017

Published in: IEEE Transactions on Information Theory (Search for Journal in Brave)

Abstract: Test response compaction for integrated circuits (ICs) with scan-based design-for-testability (DFT) support in the presence of unknown logic values (Xs) is investigated from a combinatorial viewpoint. The theoretical foundations of X-codes, employed in an X-tolerant compaction technique called X-compact, are examined. Through the formulation of a combinatorial model of X-compact, novel design techniques are developed for X-codes to detect a specified maximum number of errors in the presence of a specified maximum number of unknown logic values, while requiring only small fan-out. The special class of X-codes that results leads to an avoidance problem for configurations in combinatorial designs. General design methods and nonconstructive existence theorems to estimate the compaction ratio of an optimal X-compactor are also derived.

Full work available at URL: https://arxiv.org/abs/1508.00481

Mathematics Subject Classification ID

Source coding (94A29) Combinatorial aspects of block designs (05B05) Combinatorial codes (94B25)

Cited In (4)

• Title not available (Why is that?)
• Properties of Steiner triple systems of order 21
• Small stopping sets in Steiner triple systems
• X-Block: An Efficient LFSR Reseeding-Based Method to Block Unknowns for Temporal Compactors

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