On the delay-sensitivity of gate networks

DOI10.1109/12.177306MaRDI QIDQ5375370zbMATH OpenOpenAlexFDO

Authors Jo C. Ebergen, Janusz Brzozowski

Publication date 14 September 2018

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://research.tue.nl/nl/publications/on-the-delaysensitivity-of-gate-networks(1804716f-789b-45cb-9dfa-9688e976cc25).html

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

Cited in

(3)

• Delay-insensitivity and ternary simulation
• Generalized ternary simulation of sequential circuits
• Asynchronous logic circuits and sheaf obstructions

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