A synthesis approach to design optimally fault tolerant network architecture

DOI10.1109/12.67324zbMath1395.68061OpenAlexW2112819731MaRDI QIDQ5375384

P. D. Joshi, Abhijit Sengupta, Subir Bandyopadhyay

Publication date: 14 September 2018

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/12.67324

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10) Graph theory (including graph drawing) in computer science (68R10) Reliability, testing and fault tolerance of networks and computer systems (68M15)

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