A synthesis approach to design optimally fault tolerant network architecture

DOI10.1109/12.67324zbMATH Open1395.68061OpenAlexW2112819731MaRDI QIDQ5375384FDOQ5375384

Authors: Abhijit Sengupta, P. D. Joshi, Subir Bandyopadhyay 

Publication date: 14 September 2018

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/12.67324

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Mathematics Subject Classification ID

Graph theory (including graph drawing) in computer science (68R10) Reliability, testing and fault tolerance of networks and computer systems (68M15) Network design and communication in computer systems (68M10)

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