I/O overhead and parallel VLSI architectures for lattice computations
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Publication:5375407
DOI10.1109/12.83622zbMath1395.68357MaRDI QIDQ5375407
Jeffrey Scott Vitter, Daniel Lopresti, Mark H. Nodine
Publication date: 14 September 2018
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/12.83622
68W35: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.)
68M07: Mathematical problems of computer architecture