AT/sup 2/-optimal Galois field multiplier for VLSI

DOI10.1109/12.29475MaRDI QIDQ5375490zbMATH OpenOpenAlexFDO

Authors K. Mehlhorn, Martin Fürer

Publication date 14 September 2018

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/12.29475

Mathematics Subject Classification ID

Number-theoretic algorithms; complexity (11Y16) Numerical methods for discrete and fast Fourier transforms (65T50) Numerical algorithms for specific classes of architectures (65Y10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cited in

(1)

• A survey of some recent bit-parallel \(\mathrm{GF}(2^n)\) multipliers

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