Introduction to reconfigurable computing. Architectures, algorithms and applications. Foreword by Reiner Hartenstein.

MaRDI QIDQ5424042zbMATH OpenFDO

Authors Christophe Bobda

Publication date 2 November 2007

zbMATH Keywords

Dynamic InterconnectionHigh-Level Synthesis for Reconfigurable Devices

Mathematics Subject Classification ID

Introductory exposition (textbooks, tutorial papers, etc.) pertaining to computer science (68-01) Research exposition (monographs, survey articles) pertaining to computer science (68-02) Computer system organization (68M99) Theory of software (68N99)

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• The VHDL implementation of reconfigurable MIPS processor
• Reconfigurable architecture for image processing, analysis and digital video.
• Reconfigurable computing. The theory and practice of FPGA-based computation.
• Model-based performance analysis of coarse-grained reconfigurable processor architectures
• Temporal partitioning tool for the design of reconfigurable embedded signal processing systems
• Dynamically reconfigurable dataflow architecture for high-performance digital signal processing on multi-FPGA platforms.
• Reconfigurable computing for digital signal processing: A survey
• Designing run-time reconfigurable systems with JHDL
• Application of reconfigurable computing to a high performance front-end radar signal processor
• A framework for run-time reconfigurable systems

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