Safe reasoning with logic LTS

DOI10.1016/j.tcs.2011.03.015zbMath1216.68193MaRDI QIDQ549200

Walter Vogler, Gerald Lüttgen

Publication date: 7 July 2011

Published in: Theoretical Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.tcs.2011.03.015

zbMATH Keywords

temporal logic; safety properties; labelled transition systems; heterogeneous specification; modal refinement; ready simulation

Mathematics Subject Classification ID

68Q85: Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.)

03B44: Temporal logic

Related Items

On recursive operations over logic LTS, Processes with infinite liveness requirements, Axiomatizing Lüttgen \& Vogler's ready simulation for finite processes in \(\mathrm{CLL}_{R}\), Encoding safety in \(\mathrm{CLL}_R\), On the greatest solution of equations in \(\mathrm{CLL}_R\), ACTL for modal interface automata, Safe Reasoning with Logic LTS

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