Formal Methods in Computer-Aided Design

DOI10.1007/B102264MaRDI QIDQ5492989zbMATH OpenOpenAlexFDO

Authors Marko Samer, Helmut Veith

Publication date 20 October 2006

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/b102264

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60)

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Cited in

(12)

• Inherent vacuity in lattice automata
• Efficient detection of vacuity in temporal model checking
• Vacuity in practice: temporal antecedent failure
• Vacuity in Testing
• Formal Methods in Computer-Aided Design
• Before and after vacuity
• On the Notion of Vacuous Truth
• Synthesizing non-vacuous systems
• Computer Aided Verification
• Vacuity in synthesis
• Tools and Algorithms for the Construction and Analysis of Systems
• Beyond vacuity: towards the strongest passing formula

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