Correct Hardware Design and Verification Methods
From MaRDI portal
Publication:5493227
DOI10.1007/11560548zbMath1159.68311MaRDI QIDQ5493227
Orna Kupferman, Alon Flaisher, Doron Bustan, Orna Grumberg, Moshe Y. Vardi
Publication date: 20 October 2006
Published in: Lecture Notes in Computer Science (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/11560548
68Q60: Specification and verification (program logics, model checking, etc.)
68M07: Mathematical problems of computer architecture
Related Items
From Monadic Logic to PSL, Towards a notion of unsatisfiable and unrealizable cores for LTL, Linear temporal logic symbolic model checking, Coverage metrics for temporal logic model checking, HRELTL: a temporal logic for hybrid systems, Before and after vacuity, Vacuity in practice: temporal antecedent failure, Timed vacuity, Vacuity in synthesis, Inherent Vacuity in Lattice Automata, Synthesizing Non-Vacuous Systems, Functional Specification of Hardware via Temporal Logic, On the Notion of Vacuous Truth, From Philosophical to Industrial Logics