Correct Hardware Design and Verification Methods

DOI10.1007/11560548zbMath1159.68329OpenAlexW2483257485MaRDI QIDQ5493246

Sudarshan K. Srinivasan, Panagiotis Manolios

Publication date: 20 October 2006

Published in: Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/11560548

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Mathematical problems of computer architecture (68M07)

Related Items (2)

Improvements to Hybrid Incremental SAT Algorithms ⋮ Empirical Study of the Anatomy of Modern Sat Solvers

Uses Software

• Siege
• UCLID
• zChaff
• Chaff
• PiMaG

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