A Logical Characterisation of Event Clock Automata
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Publication:5696929
DOI10.1142/S0129054103001923zbMATH Open1101.68647OpenAlexW2143622351MaRDI QIDQ5696929FDOQ5696929
Authors: Deepak D'Souza
Publication date: 19 October 2005
Published in: International Journal of Foundations of Computer Science (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1142/s0129054103001923
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Cites Work
Cited In (16)
- A survey of timed automata for the development of real-time systems
- Learning Meets Verification
- Event-clock automata: a determinizable class of timed automata
- Event clock message passing automata: a logical characterization and an emptiness checking algorithm
- Automata and Logics for Timed Message Sequence Charts
- From timed automata to logic -- and back
- Title not available (Why is that?)
- Memory event clocks
- On regions and zones for event-clock automata
- Event-Clock Visibly Pushdown Automata
- On characteristic formulae for event-recording automata
- MSO logics for weighted timed automata
- Logics meet 1-clock alternating timed automata
- Event clock automata: from theory to practice
- Title not available (Why is that?)
- Title not available (Why is that?)
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