Bit-level systolic implementation of discrete orthogonal transforms

DOI10.1016/S0165-1684(01)00021-4zbMath0990.68074MaRDI QIDQ5958666

H. Panda, M. Narasimha Murty, S. S. Nayak

Publication date: 3 March 2002

Published in: Signal Processing (Search for Journal in Brave)

zbMATH Keywords

bit-level systolic architecturecomplexitiesdiscrete orthogonal transformsserial-parallel vector matrix multiplication scheme

Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25) Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Parallel algorithms in computer science (68W10) Application of orthogonal and other special functions (94A11)

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