Signal Transition Graphs for Asynchronous Data Path Circuits

DOI10.18255/1818-1015-2023-2-170-186MaRDI QIDQ6081683zbMATH OpenFDO

Authors Aleksandr Viktorovich Kushnerov

Publication date 5 October 2023

Published in Modeling and Analysis of Information Systems (Search for Journal in Brave)

Copyright license Creative Commons Attribution 4.0 International

Full work available at URL http://mathnet.ru/eng/mais797

zbMATH Keywords

arithmeticconformationdecompositiondelay in wireshandshakepipelineverificationweak causality

Mathematics Subject Classification ID

Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cites work

• Avoiding exponential explosion in Petri net models of control flows
• Extensions of asynchronous circuits and the delay problem. II: Spike-free extensions and the delay problem of the second kind
• scientific article; zbMATH DE number 4201658 (Why is no real title available?)
• scientific article; zbMATH DE number 5507693 (Why is no real title available?)
• scientific article; zbMATH DE number 3920392 (Why is no real title available?)
• scientific article; zbMATH DE number 3726228 (Why is no real title available?)
• scientific article; zbMATH DE number 48203 (Why is no real title available?)
• Logic Synthesis for Asynchronous Controllers and Interfaces
• Minimal energy solutions to the fractional Lane-Emden system: existence and singularity formation
• Two-level logic minimization: an overview

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