Min-rank conjecture for log-depth circuits

DOI10.1016/j.jcss.2009.09.003zbMath1247.94074WikidataQ123282575 ScholiaQ123282575MaRDI QIDQ657911

Georg Schnitger, Stasys P. Jukna

Publication date: 11 January 2012

Published in: Journal of Computer and System Sciences (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.jcss.2009.09.003

zbMATH Keywords

matrix completion; Cayley graphs; partial matrix; error-correcting codes; Boolean circuits; matrix rigidity; min-rank; sum-sets

Mathematics Subject Classification ID

94B05: Linear codes (general theory)

Cites Work

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