How to garble mixed circuits that combine Boolean and arithmetic computations
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Publication:6637574
DOI10.1007/978-3-031-58751-1_12MaRDI QIDQ6637574FDOQ6637574
Authors: Hanjun Li, Tianren Liu
Publication date: 13 November 2024
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Cites Work
- Flexor: Flexible garbling for XOR gates that beats free-XOR
- Title not available (Why is that?)
- Improved Garbled Circuit: Free XOR Gates and Applications
- Public-Key Cryptosystems Based on Composite Degree Residuosity Classes
- Garbling XOR gates ``for free in the standard model
- Secure two-party computation is practical
- How to Garble Arithmetic Circuits
- Two halves make a whole: reducing data transfer in garbled circuits using half gates
- Fast garbling of circuits under standard assumptions
- Candidate iO from homomorphic encryption schemes
- Three halves make a whole? Beating the half-gates lower bound for garbled circuits
- New ways to garble arithmetic circuits
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