On interprocess communication and the implementation of multi-writer atomic registers
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Publication:672706
DOI10.1016/0304-3975(95)00013-MzbMATH Open0874.68121MaRDI QIDQ672706FDOQ672706
Authors: Uri Abraham
Publication date: 28 February 1997
Published in: Theoretical Computer Science (Search for Journal in Brave)
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Cites Work
- On interprocess communication. I: Basic formalism
- Modeling concurrency with partial orders
- Constructing 1-writer multireader multivalued atomic variables from regular variables
- How to share concurrent wait-free variables
- Betweenness, orders and interval graphs
- The elusive atomic register
- Constructing two-writer atomic registers
- Title not available (Why is that?)
Cited In (10)
- Time-efficient read/write register in crash-prone asynchronous message-passing systems
- Parallel Processing and Applied Mathematics
- Linear-time snapshot implementations in unbalanced systems
- Self-stabilizing timestamps
- Optimal multi-writer multi-reader atomic register
- Self-stabilizing \(\ell\)-exclusion
- Multiword atomic read/write registers on multiprocessor systems
- Time and space optimal implementations of atomic multi-writer register
- Title not available (Why is that?)
- Two-bit messages are sufficient to implement atomic read/write registers in crash-prone systems
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