High-performance FPGA implementation of a recursive modular Karatsuba multiplier over GF(2ᵐ)

DOI10.1007/978-3-032-13301-4_2MaRDI QIDQ6840173zbMATH OpenFDO

Authors Ruby Kumari, Sumeet Saurav, Abhijit Karmakar

Publication date 23 March 2026

Full work available at URL https://doi.org/10.1007/978-3-032-13301-4_2

zbMATH Keywords

finite field arithmeticKaratsuba algorithmNIST irreducible polynomialpolynomial multiplier

Mathematics Subject Classification ID

Elliptic curves (14H52) Cryptography (94A60)

Cites work

• A Novel Architecture for Galois Fields GF(2ᵐ) Multipliers Based on Mastrovito Scheme
• High-precision arithmetic in homomorphic encryption
• High-Speed Polynomial Basis Multipliers Over GF(2^m) for Special Pentanomials
• scientific article; zbMATH DE number 2114384 (Why is no real title available?)
• scientific article; zbMATH DE number 5041007 (Why is no real title available?)

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