On the comparison of HOL and Boyer-Moore for formal hardware verification

DOI10.1007/BF01383943zbMATH Open0875.68136OpenAlexW1963759927MaRDI QIDQ685100FDOQ685100

Catia M. Angelo, H. De Man, Diederik Verkest, L. Claesen

Publication date: 30 September 1993

Published in: Formal Methods in System Design (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf01383943

Mathematics Subject Classification ID

Computer system organization (68M99)

Cites Work

• Title not available (Why is that?)
• Logic programming and digital circuit analysis
• FM8501: a verified microprocessor

Uses Software

• NQTHM
• Silage

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