Triple-matrix product-based 2D systolic implementation of discrete Fourier transform

DOI10.1007/S00034-015-9990-YzbMATH Open1367.68014OpenAlexW2074146639MaRDI QIDQ737012FDOQ737012

Authors: I. Mamatha, T. S. B. Sudarshan, Shikha Tripathi, Nikhil Bhattar 

Publication date: 5 August 2016

Published in: Circuits, Systems, and Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s00034-015-9990-y

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zbMATH Keywords

discrete Fourier transformfast Fourier transformVLSIFPGAsystolic array architecture

Mathematics Subject Classification ID

Numerical methods for discrete and fast Fourier transforms (65T50) Mathematical problems of computer architecture (68M07) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cites Work

• An Algorithm for the Machine Calculation of Complex Fourier Series
• A new systolic array for discrete Fourier transform
• Efficient VLSI architectures for fast computation of the discrete Fourier transform and its inverse
• A new linear systolic array for FFT computation
• High-speed and low-power split-radix FFT
• Computationally efficient systolic architecture for computing the discrete Fourier transform

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