Buffering for vector performance on a pipelined MIMD machine
From MaRDI portal
Publication:799072
DOI10.1016/S0167-8191(84)90048-6zbMath0547.65036MaRDI QIDQ799072
Publication date: 1984
Published in: Parallel Computing (Search for Journal in Brave)
Buffering blocks of data to registersHEP computermatrix vector productspipelined floating-point operationspipelined MIMD computervector performance
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