On area-efficient drawings of rectangular duals for VLSI floor-plan

DOI10.1007/BF01582878zbMATH Open0726.68061OpenAlexW1499103390MaRDI QIDQ802889FDOQ802889

Authors: Katsunori Tani, Shuji Tsukiyama, Shoji Shinoda, Isao Shirakawa 

Publication date: 1991

Published in: Mathematical Programming. Series A. Series B (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/bf01582878

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zbMATH Keywords

floor-planrectangular duallower bound estimationVLSI-CAD

Mathematics Subject Classification ID

Applications of mathematical programming (90C90) Analysis of algorithms and problem complexity (68Q25) Graph theory (including graph drawing) in computer science (68R10) Circuits, networks (94C99)

Cites Work

• Title not available (Why is that?)
• Optimal orientations of cells in slicing floorplan designs
• Rectangular dualization and rectangular dissections
• Floorplans, planar graphs, and layouts

Cited In (7)

• Octagonal drawings of plane graphs with prescribed face areas
• Rectangular grid drawings of plane graphs
• Rectangular drawings of plane graphs without designated corners
• Rectangular grid drawings of plane graphs
• Floorplans, planar graphs, and layouts
• On mathematical optimization for the visualization of frequencies and adjacencies as rectangular maps
• Rectangular dualization and rectangular dissections

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