The design and time analysis of a systolic array with asynchronous protocols for matrix multiplication

DOI10.1016/0045-7906(89)90018-9zbMATH Open0728.68060OpenAlexW2093515745MaRDI QIDQ805231FDOQ805231

Authors: Moon S. Jun, Shietung Peng 

Publication date: 1989

Published in: Computers and Electrical Engineering (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0045-7906(89)90018-9

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zbMATH Keywords

matrix multiplicationrecursive algorithmssystolic arraysTransputerasynchronous arrays

Mathematics Subject Classification ID

Computational methods for sparse matrices (65F50) Numerical linear algebra (65F99) Parallel algorithms in computer science (68W10)

Cited In (1)

• Designing of processor-time optimal systolic arrays for band matrix-vector multiplication

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