Register saturation in instruction level parallelism
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Publication:816220
DOI10.1007/s10766-005-6466-xzbMath1086.68519MaRDI QIDQ816220
Publication date: 20 February 2006
Published in: International Journal of Parallel Programming (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10766-005-6466-x
integer linear programming; instruction level parallelism; optimizing compilation; register pressure; Register requirement
68M20: Performance evaluation, queueing, and scheduling in the context of computer systems
68M99: Computer system organization
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