Model checking a cache coherence protocol of a Java DSM implementation
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Publication:864512
DOI10.1016/J.JLAP.2006.08.007zbMath1106.68013OpenAlexW2112832542MaRDI QIDQ864512
Ronald Veldema, Rutger Hofman, Jun Pang, W. J. Fokkink
Publication date: 9 February 2007
Published in: The Journal of Logic and Algebraic Programming (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.jlap.2006.08.007
Theory of programming languages (68N15) Specification and verification (program logics, model checking, etc.) (68Q60)
Related Items (4)
Unnamed Item ⋮ State Space Reduction of Linear Processes Using Control Flow Reconstruction ⋮ Symbolic Reachability for Process Algebras with Recursive Data Types ⋮ A Database Approach to Distributed State Space Generation
Cites Work
- Unnamed Item
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- Unnamed Item
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- Unnamed Item
- Unnamed Item
- Unnamed Item
- Formal stystems specification. The RPC-memory specification case study
- Fairness and related properties in transition systems - a temporal logic to deal with fairness
- Analysis of a distributed system for lifting trucks.
- Efficient on-the-fly model-checking for regular alternation-free \(\mu\)-calculus
- Verification of a sliding window protocol in \(\mu\) CRL and PVS
- How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs
- Process Algebra
- Linearization in parallel pCRL
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