Defect-tolerance in cellular nanocomputers
DOI10.1007/S00354-007-0010-ZzbMATH Open1114.68011OpenAlexW2011318626MaRDI QIDQ877463FDOQ877463
Shin'ya Kowada, Teijiro Isokawa, Yousuke Takada, Naotake Kamiura, Ferdinand Peper, Nobuyuki Matsui
Publication date: 23 April 2007
Published in: New Generation Computing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s00354-007-0010-z
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Cites Work
- FAULT-TOLERANT NANOCOMPUTERS BASED ON ASYNCHRONOUS CELLULAR AUTOMATA
- Self-Timed Cellular Automata and their computational ability
- Title not available (Why is that?)
- Title not available (Why is that?)
- UNIVERSAL CONSTRUCTION AND SELF-REPRODUCTION ON SELF-TIMED CELLULAR AUTOMATA
- Cellular automata for nanometer-scale computation
- Reverse path forwarding of broadcast packets
Cited In (4)
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