A framework for verifying bit-level pipelined machines based on automated deduction and decision procedures
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Publication:877828
DOI10.1007/s10817-006-9035-0zbMath1113.68091MaRDI QIDQ877828
Panagiotis Manolios, Sudarshan K. Srinivasan
Publication date: 3 May 2007
Published in: Journal of Automated Reasoning (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10817-006-9035-0
68Q60: Specification and verification (program logics, model checking, etc.)
Uses Software
Cites Work
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