Reduced interprocessor-communication architecture and its implementation on EM-4

DOI10.1016/0167-8191(94)00109-NMaRDI QIDQ673526zbMATH OpenFDO

Authors Shuichi Sakai, Yuetsu Kodama, Mitsuhisa Sato, Hiroshi Matsuoka, Andrew P. Shaw

Publication date 28 February 1997

Published in Parallel Computing (Search for Journal in Brave)

zbMATH Keywords

EM-4 prototypeInterprocessor communicationMassively parallel computersProgramming modelsRICA (reduced interprocessor-communication architecture)

Mathematics Subject Classification ID

Theory of software (68N99) Computer system organization (68M99)

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