swMATH11681MaRDI QIDQ23621FDOQ23621
Author name not available (Why is that?)
Official website: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=736569
Cited In (7)
- A heuristic for optimizing stochastic activity networks with applications to statistical digital circuit sizing
- Title not available (Why is that?)
- Transistor sizing of custom high-performance digital circuits with parametric yield considerations
- GGPLAB
- TILOS
- Adjoint Transient Sensitivity Analysis in Circuit Simulation
- Two-Step Algorithms for Nonlinear Optimization with Structured Applications
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