EVC
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Software:25288
swMATH13374MaRDI QIDQ25288FDOQ25288
Author name not available (Why is that?)
Cited In (7)
- Producing and verifying extremely large propositional refutations
- Effective use of Boolean satisfiability procedures in the formal verification of superscalar and VLIW microprocessors.
- Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs (MDGs)
- Building small equality graphs for deciding equality logic with uninterpreted functions
- Automated Reasoning with Analytic Tableaux and Related Methods
- Theorem Proving in Higher Order Logics
- Title not available (Why is that?)
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